Anritsu MG3700A MG3700A Manuel d'utilisateur télécharger pdf (Page 21)

Product Brochure

MG3700A 21

Marker output

Function

When a signal is allotted to a marker signal bit at waveform generation, up to three signals, such as

pulse modulation signal (for internal modulation), frame timing signal, etc., can be output.

The polarity can also be reversed.

Number of ports 3 ports

Connector TTL, BNC-J (rear panel, AUX Input/Output Connector 1/2/3)

Baseband

reference

clock signal

Internal clock signal Range: 20 kHz to 160 MHz, Resolution: 0.001 Hz

External clock input signal

Input frequency range: 20 kHz to 40 MHz

Divide and multiply functions: Signal of 1, 2, 4, 8, 16, 1/2, 1/4, 1/8, 1/16 times of input frequency

generated internally, and used as DAC sampling clock

Connector: BNC-J (rear panel, Baseband Reference Clock)

Input level:≥0.7 V (p-p)/50 Ω (AC coupled)

Waveform memory

Memory capacity

Waveform memories. A and B.

128 Msamples/channel × 2, 256 Msamples/channel Max.

With ARB Memory Upgrade 512 Msample option

256 Msamples/channel × 2, 512 Msamples/channel Max.

Number of opened les

Up to 4096 waveform patterns opened per waveform memory (A/B)

100 packages per waveform memory, 100 patterns in one package.

Minimum number of samples per pattern: 100

Memory mode

Dened Mode

Selection of a single waveform pattern to be used in either waveform memory A or B, selection of

waveform patterns using a combination le that denes addition of multiple waveform patterns, and

the addition level ratio can be set in this mode.

If a combination le that species two or more waveform patterns in waveform memory A is selected,

the following sequence operations become enabled.

• Selection of pattern switching mode (Auto/Manual)

• Selection of pattern switching point (Frame end/Pattern end)

• Switching of pattern by an external trigger signal

(enabled when the pattern switching mode is Manual)

• Restart of sequence

• Maximum number of elements: 200

• Minimum number of points per pattern: 1000

Level ratio setting range: Two-signal level ratio <80 dB or OFF

Level setting resolution: 0.01 dB

Frequency offset variable width: ± (0.8 × Sampling Clock × 2

– Bandwidth)/2

(n: Maximum integer that satisfying Sampling Clock × 2

≤80 MHz when sampling clock greater than

20 MHz.)

Frequency setting resolution: 1 Hz

In this mode, two waveform memories can be connected for use as a 256 Msamples long memory

(512 Msamples long when ARB Memory Upgrade 512 Msample option installed).

Edit Mode

One waveform each is selected from waveform memory A and waveform memory B, these two

waveforms are added and then output.

Two signal levels, the waveform memory B start offset and frequency offset, can be set.

Level ratio setting range: Two-signal level ratio <80 dB or OFF

Level setting resolution: 0.01 dB

Frequency offset variable width: ± (0.8 × Sampling Clock × 2

– Bandwidth)/2

(n: Maximum integer that satisfying Sampling Clock × 2

≤80 MHz when sampling clock greater than

20 MHz.)

Frequency setting resolution: 1 Hz

Start/Frame trigger

Function Switchable between continuous output and burst output.

Input connector

Functional change: Connector shared by Start trigger and Frame trigger; switched depending on situation

Connector: BNC-J (Front panel, Start/Frame Trigger), Input level: TTL,

Logic: Polarity Rise/Fall selected.

Start trigger Starts waveform output

Frame trigger

Searches for burst timing at burst output

Burst length data output and timing of frame trigger and waits for next frame trigger

Pattern trigger

Function When using the sequence mode, the pattern trigger will force a pattern switch.

Input connector

Connector: Front panel, Pattern Trigger, BNC-J connector

Input level: TTL

Logic: Rising or falling polarity

BER

Measurement

function

(Standard)

Function BER Measurement of demodulated data sequence

Input connector TTL, BNC-J (rear panel, BER Input)

Input signal Data, Clock, Enable (Polarity reversal supported.)

Input level TTL

Input threshold level Matches threshold (0.8 V to 2.4 V) of TTL

Input bit rate 1 kbps to 20 Mbps

Measurable patterns PN 9, 11, 15, 20, 23, ALL0, ALL1, ALT (alternating 0 and 1)

Measurable BER 0 to 1% (Reference value; changes with system conditions and data rate)

Measurable time ≤359999.0 sec

Mode Single, Endless, Continuous.

Display BitError, SyncLoss, ClockError, EnableError, Error Rate, Error Count

Measurable bit count 1000 to 4294967295 (2

– 1) bit

Auto Resync function Switched between enable/disable

1 2 ... 16 17 18 19 20 21 22 23 24 25 26 27 28

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Anritsu MG3700A MG3700A Manuel d'utilisateur Page 21

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